As discussed by Raymond J. E. Hueting et al., “A New Trench Bipolar Transistor for RF Applications”, IEEE Transactions on Electron Devices, Vol. 51, No. 7, July 2004, it is well known that, for a high-voltage transistor, the tradeoff between the drift resistance and the breakdown voltage is improved by the reduced surface field (resurf) effect. The objective is to reshape the electric field distribution in the collector drift region for a reverse bias situation to form a more uniform field distribution with a reduced maximal field.
Hueting at al. propose a vertical trench SiGe junction bipolar transistor (BJT) that improves the tradeoff between the cutoff frequency fT and the off-state collector-base breakdown voltage BVcbo. Their simulations show that an increased fT*BVcbo product can be obtained by providing a BJT having a trench field plate connected to the emitter and a linearly graded doping profile in the collector drift region.
While the Hueting et al. publication provides a theoretical concept for improving the performance characteristics of a BJT device, it does not disclose a practical BJT device structure or fabrication method for realizing the concept.
Co-pending, commonly-invented and commonly-assigned U.S. application Ser. No. 11/003,095, titled “Bipolar Transistor Structure With Field Plate”, and filed on the same date as this application, discloses a structure and fabrication method for realizing the Hueting et al. concept. U.S. application Ser. No. 11/003,095 is hereby incorporated by reference in its entirety.
Referring to FIG. 1, the above-cited application Ser. No. 11/003,095 discloses a bipolar junction transistor (BJT) structure 100 formed in a silicon substrate 102. An N+ collector buried layer (BL) 104, typically formed by conventional implant, is provided at the upper surface of the substrate 102. An epitaxial silicon layer 106 is formed on the substrate 102 over the N+ buried layer 104. An isolation structure that includes deep trench isolation (DTI) and shallow trench isolation (STI) is provided and an N+ sinker region 108 is formed in the epitaxial layer 106 in the conventional manner. Field plate trenches 110 are etched into the BJT active region to surround the collector active well region. The conductive field plates 112, which may be doped polysilicon or tungsten silicide, are formed in the field plate trenches 110 and isolated from the surrounding epitaxial silicon 106 of the collector well by intervening trench liner dielectric material 114 (e.g., TEOS). The field plate trenches are filled with dielectric material (e.g., TEOS). A doped polysilicon emitter contact 116 is formed in electrical contact with a SiGe intrinsic base region 118 and extrinsic base polysilicon 120. Dielectric material 122 (e.g., TEOS) separates the base poly 120 from the poly emitter contact 116.
The field plate 112 of the FIG. 1 BJT structure 100 may be separately contacted or shorted to the emitter terminal. As discussed above, the presence of the field plate 112 modifies the shape of the electric field in the collector well region. The doping level in the collector well region is graded from the collector buried layer 104 to a lower concentration at the base junction. In a properly optimized structure, the equivalent device breakdown characteristics can be realized with substantially higher net collector well doping levels. As further discussed above, this increase reduces the collector series resistance and, therefore Vcesat, and delays the onset of base pushout, resulting in a substantially higher peak fT.
However, the FIG. 1 emitter shorted field plate approach requires that an alignment tolerance be observed in formation of the field plate trench structures.